Accurate modeling of the avalanche breakdown behavior is critical to capturing experimental artifacts in simulations. In this work, the avalanche breakdown observed in avalanche-type bipolar junction transistors (FMMT417) is modeled, where a macromodel proposed earlier in the literature is extended to become compatible with practical circuit simulators. Moreover, contributions to the macromodel are introduced and implemented. Novel contributions to the available avalanche breakdown circuit model are made, which have also been examined in the simulation environment. Inferences from simulation cases depict that the model closely matches the experimental characteristics of the breakdown mechanism.